Version: 1.0
Status: Ongoing (Design Completed — Manufacturing Pending)
Category: Embedded Systems · Digital Communication · PCB Design · Educational Hardware · Communication Systems
Institution: Madras Institute of Technology, Anna University
Development Period: 2026 – Present
Project Type: Educational Communication Trainer Kit
Resume Reference: Designed and developed a custom TDMA trainer kit using a PCB, Arduino Nano, shift registers, and embedded firmware for engineering education.
Overview
The TDMA Communication Trainer Kit is an educational hardware platform that demonstrates how Time Division Multiple Access works in practice.
It lets students see sequential multi-user transmission over a shared channel using dedicated hardware instead of simulation software. The design phase is complete, including the architecture, schematic, PCB layout, firmware planning, frame design, and manufacturing preparation.
Motivation
Most communication labs explain TDMA only in theory. This project is meant to give students something tangible they can use to observe framing, multiplexing, synchronization, and transmission at the hardware level.
Objectives
- Design a standalone TDMA educational trainer.
- Demonstrate sequential time-slot allocation.
- Show framing, synchronization and parity generation.
- Develop custom PCB for laboratory usage.
- Create a reusable trainer for communication engineering courses.
- Arduino Nano
- 4-bit Parallel-In Serial-Out Shift Registers
- User input switches
- Clock generation circuitry
- LEDs for visualization
- Power regulation
- Custom PCB
- Test points for debugging
- Schematic capture
- Footprint verification
- ERC & DRC validation
- Component placement
- Routing optimization
- Ground and power distribution
- Test point placement
- Mounting holes
- Manufacturing outputs (Gerber, Drill, BOM)
- PCB fabrication
- Component assembly
- Functional testing
- Design validation
- Slot scheduling
- Frame generation
- Parity calculation
- Shift register control
- Clock synchronization
- Time Division Multiple Access
- Digital framing
- Shift registers
- Digital communication
- PCB design workflow
- Embedded firmware
- Hardware debugging
- Variable number of users
- UART visualization
- PC monitoring software
- Error injection mode
- CRC implementation
- Wireless demonstration
System Architecture
User Inputs
→ Parallel Input Registers
→ Frame Generator
→ TDMA Scheduler
→ Arduino Nano Controller
→ Shared Communication Bus
→ Receiver / Decoder
Hardware
Communication Frame
Start Bit → 2-bit User ID → 4-bit User Data → Parity Bit
Each user is allocated an independent time slot. The controller sequentially polls users, constructs frames and transmits them over the shared medium.
PCB Design
Completed:
Pending:
Software
Arduino firmware manages:
Expected Learning Outcomes
Current Status
Design Phase: ✅ Completed
Manufacturing: ⏳ Pending
Assembly: ⏳ Pending
Testing & Validation: ⏳ Pending
Documentation: 🚧 In Progress
Future Improvements
Keywords
TDMA · Time Division Multiple Access · Arduino Nano · PCB Design · Digital Communication · Shift Register · Educational Trainer · Embedded Systems · Communication Engineering